CSCI E-93: Application Note 8

The Memory Subsystem and Memory Addresses
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The memory subsystem provides a uniform view of two different kinds of
memory and also of the memory-mapped I/O devices.  All memory and I/O
devices are accessible through the memory protocol described in the
"processor-to-memory interface" document on the class web site.  Note
that this document describes the memory address as a 21-bit wide
vector.  This results in an address space of 2M bytes of
byte-addressable memory.  The 2M bytes of memory is available on both
the DE2-70 and on the DE2-115.

Terminology: In this document, the term "word" will refer to a 16-bit
quantity and the term "double-word" will refer to a 32-bit quantity.

Remember that no alignment is required to read or write a byte from
the memory subsystem [byte-size operations occur when mem_thirtytwobit
is 0 and mem_sixteenbit is 0].  However, word alignment is required
when reading or writing a 16-bit word (i.e., the memory address must
be even) [word-size operations occur when mem_thirtytwobit is 0 and
mem_sixteenbit is 1].  And, double-word alignment is required when
reading or writing a 32-bit double-word (i.e., the low-order two bits
of the memory address must be zeros) [double-word-size operations
occur when mem_thirtytwobit is 1].

Also, remember that our memory subsystem is little endian.

The MIF format is described in the "Altera Memory Initialization File
(.mif) format" document on the class web site.


On the Altera Terasic DE2-70 or the DE2-115, there is a limited amount
of on-chip memory in the FPGA.  The memory subsystem that we have
furnished to you allows you to access 32K bytes of on-chip FPGA memory
in the DE2-70 and 64K bytes of on-chip FPGA memory in the DE2-115.
This on-chip FPGA memory is the limited amount of memory that you are
able to see in Quartus' In-System Memory Content Editor and it is also
the limited amount of memory that can be initialized by loading a MIF.

Keep in mind that when using Quartus' In-System Memory Content Editor
and also when constructing a MIF, the addresses that must be used are
word-based addresses, not byte-based addresses.

As described in Problem Set 4, for the DE2-70, the value for the DEPTH
parameter must be 16384, and the WIDTH parameter must be 16.  For the
DE2-115, the value for the DEPTH parameter must be 32768, and the
WIDTH parameter must still be 16.


The second kind of memory that is available to you is off-chip RAM.
When you access an address in excess of 32K on the DE2-70 or in excess
of 64K on the DE2-115, you will be accessing off-chip RAM.  The memory
subsystem that we furnish to you makes access to the on-chip and
off-chip memory be seamless.


I/O devices are accessible through memory addresses as defined in the
"specification for the interface to terminal I/O" document on the
class web site.  This special addresses are not mapped to memory
locations.  They are used solely to perform I/O to devices.